Rachit Nigam

Got it! I'd start by looking at all the groups that use the adders in question. What you're likely to find is there is some group that does a comparison...

Awesome job on sleuthing around the squeezenet problems. I do agree that it is troubling to see 500 million cycles for just one layer. A couple of experiments to do:...

Ah, got it. Cycle count is one part of the equation. One "easy" way to reduce cycle count is by unrolling loops in Dahlia (not really easy because you need...

[This paper](http://www.sunburst-design.com/papers/CummingsDVCon2019_Yikes_SV_Coding_rev1_0.pdf) might also help us figure out how to generate faster to simulate Verilog!

@calebmkim does moving to the new version of TVM + your previous fixes help resolve this issue?

Yup, definitely a whole program analysis

Desiderata: - Largest Mux generated = max(# of assignments to a port) - Total number of muxed assignments

This program is miscompiled: ``` decl alpha_int: ubit[1]; let A: ubit[8][8 bank 2]; for (let i: ubit = 0..8) { for (let k: ubit = 0..8) unroll 2 { let...

CC @mikeurbach since you mentioned you are interested in seeing this get done.

I've updated the task list using the current state of the implementation. To start off with, the compile control implementation does indeed use the old, inside-out compilation algorithm that instantiates...