Adam Greig

It looks like you're specifying features for [stm32f0xx-hal](https://github.com/stm32-rs/stm32f0xx-hal), which is a separate repo - the PAC only provides `stm32f0x0`, `stm32f0x1`, `stm32f0x2`, and `stm32f0x8` features. I've moved this issue to that...

Currently there's no option to generate an svd entirely from scratch, because each "device" top-level yaml file requires an `_svd` key. I think that requirement could be weakened to start...

Do you mean 'CCM' (or 'DTCM' on STM32F7 and H7)? It's a bit more complicated: on STM32F4, you **can't** use the CCM ("core-coupled memory") for any DMA access; it's only...

> I'm not quite sure which version of the SVDs stm32.agg.io contains (last published or nightly) There's a cronjob that runs every 15min to git pull && make html, so...

I appreciate you taking a fresh look at the problem! The concern around redistribution of modified SVDs is about their copyright. I don't know how significant the concern is. I...

> MPU regions must be 32-byte aligned. They must be aligned to the size of the region, which must be a power-of-two number of bytes and at least 32 bytes....

Thanks, we'll need to update this in cortex-m-rt. Related to https://github.com/rust-embedded/cortex-m/issues/332.

I think there's fairly broad support for removing the trampline from cortex-m-rt, but we can't do it in the 0.7 series as it's a breaking change, and we're reluctant to...

> In the meantime, does it seem like a reasonable stop-gap for my project to handle SPI bus sharing by just passing the `&'static Mutex` around? This would allow for...

Because AtomicDevice uses the portable-atomic crate, you can enable support for CAS on targets that don't normally have it with either the critical-section or unsafe-assume-single-core features: https://crates.io/crates/portable-atomic#optional-features-critical-section Having to add...