Adam Greig

@romancardenas, @almindor, would you mind checking the [proposed rv32 file](https://github.com/adamgreig/rust/blob/target-support-rewg/src/doc/rustc/src/platform-support/riscv32imac_unknown_none_elf.md)? In particular > * I've combined i, imc, and imac into one file, as they're all tier 2 targets with...

> I also think that we should pursue making the im target tier 2 if possible, I don't see a reason why that would be rejected. I think we can...

Thanks! I've removed the quickstart link for now. The final thing is the missing "building rust programs" and "cross-compilation toolchains and C code" for riscv32, any ideas there?

@romancardenas > I'd update the riscv-rust-quickstart repo to align it with a RED-V clone for now. I have a couple of RED-V boards, so I can take a look. But...

Closing this issue as part of today's triage. We _do_ still need better conditional compilation support in Rust, but the embedded WG isn't the place to develop it. Some workarounds...

Current policy is: https://github.com/rust-embedded/wg/blob/master/ops/msrv.md ref: #304 #285

Currently our policy suggests the highest allowable MSRV is stable-1. Given the stability we want to maintain with the upcoming 1.0 releases, I think we should consider changing this to...

The main things you'd want to get similar support to cortex-m and riscv is something like an architecture crate (e.g. `cortex-m`) which provides asm intrinsics and perhaps drivers for the...

In general :+1: on this. For the PACs, we don't host them in the wg, and svd2rust doesn't generate `Cargo.toml`, so I think all we can do is open issues...

Closing this old issue as part of today's triage. Many boards are now popular with, and well supported by, various embedded Rust efforts, such as the microbit in our own...