Scott Mabin

DMA CNDTR Serial RX

3

I am using the DMA with a circular buffer to recieve serial data on a UART, its working fine if it fills up both halves of the circ buffer. The...

Define an MSRV

3

The readme states the MSRV is the latest stable Rust, but I think now that defmt is a staple in the embedded-rust ecosystem you should consider picking an MSRV and...

[RFC] Timer abstraction design

5

## Rationale Copying from https://github.com/esp-rs/esp-hal/issues/1318#issuecomment-2059823266: We currently have no shared API between timers, i.e TIMG and SYSTIMER are completely different and cannot be abstracted over, but in reality they all...

Riscv stable CI

2

## Thank you for your contribution! We appreciate the time and effort you've put into this pull request. To help us review it efficiently, please ensure you've gone through the...

Use `set_interrupt_handler()` everywhere and consider creating a trait

3

Imo after some time playing with it, the constructors taking `Option` are not that pleasant to use. I think it would be better if everywhere was consistent and used `set_interrupt_handler`....

Possible interrupt footgun on multicore systems

1

Now that the interrupt is handled internally by the peripheral driver, the interrupt is configured for the core the driver is created on, which means if core 0 creates a...

The way we use cargo workspaces means that rustfmt doesn't format all of our projects. We should extend the xtask to handle this.

Pending some PAC updates to cluster the registers

TRNG driver

1

Copying from https://github.com/esp-rs/esp-hal/issues/1296#issuecomment-2004586786 Possible solutions: 1) have two separate constructors for RNG (normal) and TRNG (will also take ADC peripheral so user won't be able to use them together) 2)...

Allow SYSTIMER alarms to be configured for blocking or async individually

2

Title, and a bit more analysis here: https://github.com/esp-rs/esp-hal/issues/1318#issuecomment-2059823266