zhuzhineng

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Hello, may I ask whether Openwifi has time slot division in FPGA

This problem will not occur when using the precompiled image you provided, but will occur when compiling the source code using Vivado 2018.3 Using the bitstream file provided in the...

Hello, may I ask whether Openwifi has time slot division in FPGA

At that time, we replaced your original bitstream and DHF files with our own generated bitstream and DHF files, and then generated boot.bin files, and then performed the basic operations...

Hello, may I ask whether Openwifi has time slot division in FPGA

How to use our own bitstream and HDF files to generate boot.bin files

Hello, may I ask whether Openwifi has time slot division in FPGA

When we modified the FPGA project, we generated new bitstream and HDF files, how to apply to openWiFi project