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I also have the same question. And I also wonder why SSIP is not lile SEIP which is read as the logical-OR of interrupt controller signal and the software writeable...

And, can SSIP also be clear by an interrupt controller?

> To the first question (from last year), it is up to the "platform-specific controller" as to when it sets SSIP to 1. > > An interrupt controller cannot clear...

I faced exactly same problem as you do, even use same application (notepad ).

+1

Sorry, I can't understand these two paragraph: > MVIP/HVIP which is still a single M-mode/HS-mode bit (whatever it is an aliasing bit or logically ORed bit), is a kind of...

Now I get that virtual interrupt is for hypervisor to filer the interrupt directed to vs mode, but I still don't have an idea about the concrete scenario in which...

Thank you for replying @lixiaogangkkk . I finally understood this, but now I'm confused about what should be the priority of virtual interrupts, such as a SEI directed to S...