Zhili Xiong

Thanks! I was able to eliminate the pin mapping warnings. However, I still meet another error. ``` zhilix@eda15:/home/local/eda15/zhilix/projects/RapidWright$ java com.xilinx.rapidwright.interchange.PhysicalNetlistToDcp FPGA01_rapidwright.netlist example_FPGA01_properties.phys example_FPGA01_properties.dcp Exception in thread "main" java.lang.RuntimeException: ERROR: Couldn't...

Yes, here are the updated files: [new_phys_netlist.zip](https://github.com/Xilinx/RapidWright/files/9398327/new_phys_netlist.zip)

It seems I'm keeping meeting bugs

This time I fixed the overlap, but still meet another NullPointerException ``` zhilix@eda15:/home/local/eda15/zhilix/projects/RapidWright$ java com.xilinx.rapidwright.interchange.PhysicalNetlistToDcp FPGA01_rapidwright.netlist example_FPGA01_no_overlap.phys example_FPGA01_routesite.dcp Exception in thread "main" java.lang.NullPointerException at com.xilinx.rapidwright.design.Cell.getEDIFCellInst(Unknown Source) at com.xilinx.rapidwright.design.SiteInst.routeSite(Unknown Source) at...

Just to give an update about this issue, I still got issues with IOs on vivado by running "route_design". I think I got the A6 pin problem fixed in my...

Thanks a lot!! I actually cleaned the checkout and added the Vcc connections to the site pin A6 inputs. Now I got 0 error after running "route_design -no_timing_driven" and "report_route_status".