Ronen Ulanovsky

@sstefan1 Well, we don't currently have any xtensa intrinsics support, but it would go to stdarch/core_arch [here](https://github.com/rust-lang/stdarch/tree/master/crates/core_arch). It lives out of tree, so will need to be forked by the...

@ramtej as soon as the esp32s3 changes land on [espressif/llvm-project](https://github.com/espressif/llvm-project) or one of its branches, I'll start working on the PR for [esp-rs/rust](https://github.com/esp-rs/rust).

[Here](https://github.com/zRedShift/rust-esp/tree/esp32s3-dsp)'s my branch with experimental support of this in Rust. I ran into some issues/funky business (with the immediate addressing constant in `ee.vld.128.ip`, which I think is an issue with...

@sstefan1 ```llvm declare void @llvm.xtensa.ee.vld.128.ip(i32, i32, i32) nounwind define void @test2(i32 %p){ tail call void @llvm.xtensa.ee.vld.128.ip(i32 5, i32 %p, i32 16) ret void } ``` If I generate assembly with...

Sure, I didn't trust the objdump blindly, I made sure I tested it on one of my ESPS3S3 chips. I ran this memcpy test: ```rust #[repr(align(16))] pub struct AlignedArray([u8; N]);...

@sstefan1 Thank you. I suspected something like that but didn't have time to look into it over the last few weeks. Glad it's been resolved. I remember also encountering that...

@algesten Hi, I'm happy to update that this solved the OOM issue on our deployments.