yyshen

Clear sctlr_el1.uci bit explicitly

9

Clear the sctlr_el1.uci bit to trap EL0 cache maintenance instruction to EL2. Previously, the we rely on the reset value, which is probably 0.

In PR #367 , clean to PoC is needed on some aarch32 platforms. However, usually clean to PoU should be sufficient for page table changes. For Cortex-A15, according to this...