Jakub Urbańczyk

I am not sure if I see where exactly the problem is. I looked at the execution of `TestCoreInterrupt_0_interrupt_asm` and it seems that the core works fine, at least from...

OK, thanks, now I can see it. I wonder though, why do we even allow for speculatively resuming the fetch unit? If we are precommiting a CSR instruction _without_ side...