Catherine
Catherine
I think this isn't something I'm considering integrating in the next few development cycles, sorry.
> Is the project structure likely to change until it may become relevant? Yes, the current system of Fragment rewriting is likely going away entirely.
I've never seen anyone express any interest in this feature, and it's not trivial to implement because of the highly special treatment of `ArrayProxy` today. Because of that I'm closing...
This has been requested on the Aug 3rd meeting: https://freenode.irclog.whitequark.org/nmigen/2020-08-03#1596478574-1596478045; reopening since the reason for closing was that "seemingly no one wants this".
> I suppose it's not really a CXXSim bug, since we shouldn't really be writing to some private Memory array. Why are you not using `yield mem[0].eq(0x5432123412345678)` in pysim-only code?
Right, in this case this is a current limitation of cxxsim already mentioned in #324 (but it's ok to track it separately here).
What you're hitting is definitely a bug. I'll need a bit of time to dig into it and figure out exactly what's happening.
> I replaced `m.d.comb` with `m.d.sync` for the cover and asserts `Past` doesn't really work inside `m.d.comb`, since it takes the domain for the inner register from `m.d.`. That's either...
Maybe put `setattr -set gclk 1 w:clk` in your Yosys script for the time being?
Sorry, I forgot you're in a design context. Try `setattr -set gclk 1 top/w:clk`.