vaughnbetz

I'm surprised the runtime would increase a lot by specifying an sdc file on some tests; probably worth running locally to see where the runtime increase is and if there...

From a look at the logs with Sitong, it looks like maybe some very large files were generated and were taking a long time (~2 hours or more) and making...

Thanks @zhaisitong . It looks like the strong sanitized tests failed on the new constraints test, all on neuron (maybe the only circuit tested). full command: /usr/bin/env time -v /root/vtr-verilog-to-routing/vtr-verilog-to-routing/vpr/vpr...

@duck2 : are these tbb sanitizer errors expected? They are very unlikely to have anything to do with what Sitong is working on. If they've been around for a while...

This PR seems to have been having trouble getting CI to run; yesterday there appeared to be an infrastructure issue in the google cloud. @zhaisitong relaunched CI; I'm watching it...

Do they also occur on wintermute?

Workaround: try the master branch; we've switched to ezgl (updated / more powerful rewrite of easygl layered over gtk). Hopefully that builds. Assigning to Mashad in case she has any...

Looks like a good change and the code looks good. Started CI.

Everything passed except the python format test. Please use make format-py to fix that and push the changes and we can merge them (see the failed python formatting test for...

Nightly test 1 results has a few QoR failures (8) but they look benign: - one small circuit (mult113) has a wider channel width - one small mcnc circuit has...