Discrete clock auto-clock gating logic?

[edwardcwang]

Follow up to ucb-bar/hammer-cad-plugins#83

@colinschmidt @jwright6323 Unfortunately it turns out that ucb-bar/hammer-cad-plugins#83 does break some technologies by default, FYI. Not sure if this is actually the case or whether some technologies require special attention to force Genus to recognize the cell?

In particular, is Genus' suggestion of enabling lp_insert_discrete_clock_gating_logic useful?

Error   : Cannot find any usable integrated clock-gating cell. [POPT-78] [syn_generic]
        : The provided library does not have a usable integrated clock-gating cell.
        : If the library has an integrated clock-gating cell, but this cell has either a 'dont_use' or a 'dont_touch' attribute set to 'true', the cell is considered unusable. To make the cell usable, set the 'avoid' attribute for the lib_cell to 'false' in Genus. If the library has no integrated clock-gating cell, you can set the 'lp_insert_discrete_clock_gating_logic' root attribute to 'true' to allow Genus to create discrete clock-gating logic for the insertion.
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[jwright6323]

It sounds like this technology just might not have clock gaters. Let's dicuss this offline.

[jwright6323]

@edwardcwang is this still high priority? I can't remember if we figured this out.

[edwardcwang]

We worked around it by turning off the clock gating altogether, though it's probably not idea. CCing @jamesdunn

[jwright6323]

I'm not sure what this issue is intended to track- are you proposing that in the auto mode we turn off clock gating if a technology doesn't have ICG cells?

[edwardcwang]

If the technology (for whatever reason) is missing ICG cells, it would be nice to not have Genus crash and burn in auto mode (e.g. a possible fix is to just ignore and proceed as if clock gating was turned off)

[jwright6323]

ok, I think we could do something like

if {llength [get_db .base_cells -if {.is_integrated_clock_gating}] > 0} { <clock gating commands> }