ucb-bar
DMA buswidth
Hi, I`m trying to configure DMA buswidth of 256 (not default 128) with systolic array size 32 x 32. In Configs.scala, there is parameters for DMA options.
1. max_in_flight_mem_reqs = 16,
2. dma_maxbytes = 64,
3. dma_buswidth = 128,
I think dma_buswidth value should be reconfigured with 256.
But, Application is stalled. Ive tried several things, but it doesnt work.
What should i do to increase buswidth correctly? Thanks.
Unfortunately, in your example, increasing dma_buswidth only increased the bus-width on Gemmini's side, but didn't actually increase the system bus-width connecting to Gemmini from other components on the SoC. So that mismatch may have caused the stall you observed.
Commit 7c16dcf349e84c23f2af5176043185e3046b909b to the dev branch should have fixed this for CustomGemminiSoCConfig (which is what you build when you run the ./scripts/build-verilator.sh script). You can try installing Gemmini's dev version by following the instructions here and that might fix your issue. This fix should also be merged into the master branch in a new Gemmini release sometime in the next few weeks.
