Using DspReal somewhere should generate warning in verilog

[grebe]

We've talked about adding UInt -> DspReal functionality. We already have DspReal -> UInt. Having both makes it a lot easier for unsynthesizable code to get left in accidentally, especially by library code.

There should be some sort of mechanism that warns a user that unsynthesizeable code is being generated as well as a note about what code is adding it. Perhaps a comment at the top of the emitted verilog as well as a print statement during chisel generation.

[shunshou]

Technically should be DspReal -> Int and Int/Fixed -> DspReal**