DecoupledIO.fire() emits erroneous Verilog

[yunsup]

Look at "FIXME Chisel" in https://github.com/ucb-bar/hwacha/blob/5cad463d5e4aee2271c7e31d68d683c397300caf/src/main/scala/vmu.scala.

I had to use the actual ready signal coming out of a children's module rather than doing vvaq.io.deq.fire() or vpaq.io.enq.fire().

[jackbackrack]

check to see if this is still broken (i.e., tighten cross module reference checks).