Adding infrastructure for RoCC interface attached to Spike processor. Memory interface to follow.

[mihai-c-tudor]

Related PRs / Issues:

Type of change:

• [ ] Bug fix
• [x] New feature
• [ ] Other enhancement

Impact:

• [x] RTL change
• [x] Software change (RISC-V software)
• [ ] Build system change
• [ ] Other

Contributor Checklist:

• [x] Did you set main as the base branch?
• [x] Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
• [x] Did you state the type-of-change/impact?
• [x] Did you delete any extraneous prints/debugging code?
• [x] Did you mark the PR with a changelog: label?
• [ ] (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
• [ ] (If applicable) Did you add documentation for the feature?
• [ ] (If applicable) Did you add a test demonstrating the PR?

• [ ] (If applicable) Did you mark the PR as Please Backport?

[mihai-c-tudor]

Makes sense, changes implemented.