tremalrik

No idea about VIA C3, but I have recently been able to test the `REPNZ XSTORE` (`f2 0f a7 c0`) instruction on a Zhaoxin KX-U6580 processor (which officially supports Padlock)....

In addition to the above, XED also allows 16-bit addressing for several MPX instructions where the SDM doesn't, e.g. `xed -mpx -32 -d 67 f3 0f 1b 00` returns `bndmk...

Given the title of this issue, a (rather theoretical) issue with supporting L1OM under something like XED_CHIP_ALL is that there exist some opcode collisions betwen L1OM and AVX-512. E.g. the...

No, I believe `XLAT` is unique in that regard.

`RMPUPDATE` is a bit unusual in that it takes two address operands that are treated very differently - RCX appears to be a conventional effective-address that points to a 16-byte...

For AltMovCr8, I decided to do a few tests on an AMD EPYC instance. Given how this feature works - using the LOCK prefix to get access to a register...

This looks like it should also apply to `int`, `iret`, `sysenter` and `sysexit`, as all of these modify `cs` and might modify `ss` as well. (`syscall` and `sysret` correctly list...

Such a decoder mode makes sense for the two GMI instructions at least. I'm much less sure about whether any of the other items I've found are truly Zhaoxin-specific, though...

I've done a bit more testing, and made a few more minor findings: * `rep montmul`, in addition to lacking support for 64-bit addressing, also appears to lack support for...

As of Zydis commit https://github.com/zyantific/zydis/commit/8948d9a8f493330d27a0e7bbebf40f0391e45f1b, both XED (at least the last version that supports KNC) and Zydis are in my testing now correctly enforcing the `VEX.L=0` constraint for these two...