memory-accelerators topic

Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)

neurosim

Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)

neurosim

MAPLE's hardware-software co-design allows programs to perform long-latency memory accesses asynchronously from the core, avoiding pipeline stalls, and enabling greater memory parallelism (MLP).

PrincetonUniversity