Daniel Egger

Such a trait might be a bit tricky so set up because essentially this would have to be some sort of callback which gets invoked if some master asserts the...

Hm, `take()` is guarded by a singleton to protect multiple use. If the `unwrap()` failed that would suggest that someone has taken the peripherals before. We probably should update the...

TBH this shouldn't be using `f3` anymore, it is not being worked on and superceded by other efforts. https://github.com/rubberduck203/stm32f3-discovery could probably replace it, or we could integrate the relevant parts...

@dzarda Sure, but why do you need special traits for that case? The traits only care about the data transfer, not the initialisation or the hardware connected to it. So...

> I guess we're missing a Read trait to support this? Not sure, you still have to clock out a number of `Word`s to do the `Read`s so I guess...

Step one: Figure out a way to get 8051 support into LLVM, similar to the AVR project https://github.com/avr-llvm/llvm.

@rubberduck203 The book tries to stay vendor neutral or generic as far as possible. However if something cannot be taught in a neutral setup I believe it is more relevant...

Great stuff. I like how you're tackling DMA. However I feel there's one very important piece missing in the embedded-hal world: The ability to tie interrupts to HAL periperals. You...

I should probably add that I view interrupt support as a much more important topic for async IO and DMA mostly as a method to reduce interrupt frequency and contention....

@jamesmunns Plenty of Cortex-M chips have a peripheral to peripheral communication but it's often not called DMA (because it isn't necessarily just that), e.g. the Nordic NRF have it and...