Teodor-Dumitru Ene
Teodor-Dumitru Ene
Hi @WoosukKwon @zhuohan123 The absence of a chunked prefill implementation in vllm is a major blocker. Any kind of timeline or regular communication on progress towards a chunked prefill implementation...
Excellent question! In short, I had to stop supporting higher-radix structures because it was too much effort and it went beyond the [papers](https://www.ams.org/journals/jams/1988-01-03/S0894-0347-1988-0928904-4/) I was relying on. Here's what's needed...
If, however, the HDL generated by this tool is plugged into a synthesis tool with a logic optimizer, radix-4 adders can be emulated. A radix-2 adder could just be flattened/partitioned...
Really quickly, what width/size are the adders you're generating?
Just want to update: give me a few days, this work-week is busy for me. I'll look at it when I have a break. Perhaps this may be relevant though:...
In my mind, this builds off of the topic of [adding a constant value](https://tdene.github.io/synth_opt_adders/notebooks/hardware_operations.html#Possible-expansion:-adding-a-constant-value). The section I've linked there is old and badly-written, apologies. Specifically, in your case of adding...
So in short, the following method: - Build a structure for the lower bits. - Only connect it in into the higher bits on the very last step. should be...
Related: #104 #106
The following are my thoughts: - Legacy diagrams are very useful for educational purposes and should be supported, as per #104 - Legacy diagrams can be quickly revived without the...
Hello! Sorry for the late response, I've been busy trying to meet some self-imposed deadlines. I can't readily think of any books I would recommend on the topic of fast...