sy2002
sy2002
At a ton of places within QNICE, we have the situation that you can tell a vhdl entity via a generic some size or some dimension such as speed (in...
Gentlemen, it is great, that @MJoergen is diving into the hardware architecture / FPGA architecture of QNICE-FGA from scratch, because this shows us, where we might want to add those...
Handle PMODs: XDC and stable default settings in the top files:
From a Skype discussion between @sho3string and @MJoergen: ==== So this core has vertical / horizontal center for the vga out display. Currently, the display is shifted to the right...
Here is the QNICE branch which is based on the "M2M branch" V1.61 that includes MJoergen's new SD card controller: https://github.com/sy2002/QNICE-FPGA/tree/mfj_new_sdcard MJoergen's new SD controller passed "F+D" in the monitor...
In the VIC20 config.vhd we find something like this: ```vhdl OPTM_G_SUBMENU, -- RAM: %s OPTM_G_TEXT + OPTM_G_HEADLINE, -- RAM expansions OPTM_G_LINE, -- OPTM_G_EXP_PORT + OPTM_G_SINGLESEL, -- $0400 (3KB) OPTM_G_EXP_PORT +...
Each core is supposed to deliver these signals to the M2M framework: ```vhdl -- Video output video_ce_o : out std_logic; video_ce_ovl_o : out std_logic; video_red_o : out std_logic_vector(7 downto 0);...
The framework should offer SDRAM support in a Dual Port Dual Clock fashion that also allows working on the falling edge, so that QNICE can be used to "fill" the...
As soon as we support the RTC in hardware (https://github.com/sy2002/MiSTer2MEGA65/issues/29) then we can start tackling it in the firmware. One obvious idea what the firmware can do with an RTC...
As of the time of writing this, I (sy2002) have no idea about all the magic that is happening in various retro project to generate a greatly improved retro look...