Stas

Baremetal program upload

5

Hi Eugene, I play with uploading my own baremetal program to your RISC-V@FPGA Your documentation suggest that I >Copy boot.elf to the SD card I do this manually: unplug FPGA...

make flash: connection refused

3

Hi Eugene, I run "**make CONFIG=rocket64b1 BOARD=nexys-a7-100t flash**" and get the following error: **Connection refused** When I check the make output, I see: **env HW_SERVER_URL=tcp:localhost:3121 \ xsdb -quiet board/jtag-freq.tcl rlwrap:...

## Describe the changes Icicle examples: Concurrent Data Transfer and NTT Computation This PR introduces a Best Practice series of examples in c++. Specifically, the example shows how to concurrently...

Hello everybody ### 🌟 Feature Request The recent announcement of a [Prover Market Study](https://github.com/matter-labs/research-prover-market-client/tree/main) doesn't provide a **reference design**. It would be great to provide such a design together with...

Stas/vecop/reduction

1

## Describe the changes This PR adds vector reduction operations (sum of elements, product of elements) to CPU backend. Specific changes: 1. Debugged CPU reduction operations 2. Registered at the...