Santiago Piccinini

Results 76 comments of Santiago Piccinini

The problem seems to be related to the detection of the layers for the zones

> Check if the power fluctuates with an oscilloscope. Maybe it just needs a decoupling capacitor. Thanks @CodeFetch for the sugestion. I already mesured, DC power is good, and the...

The culprit of this issue is that the PCIe is generating the interference. The power sources are not the problem as we bypassed them and the problem persisted. When we...

Hi what do you mean with process parameter? PCB stackup?

Hi stephen! Oh yes we still not uploaded the core board design project files. The Core board was designed using some propiertary EDA tool because it was based in a...

Just for reference this is how much the gerber files generated by kicad must be translated to match the eagle files ![image](https://user-images.githubusercontent.com/500841/73398376-1addfb00-42c4-11ea-99b2-cc9bc86f23e6.png)

The four "mounting board holes" are 30 mils below (the blue is the correct position): ![image](https://user-images.githubusercontent.com/500841/73400188-647c1500-42c7-11ea-8c3a-e2dd2f73d77d.png) @xcancerberox Maybe something is 30mils in an incorrect position, how did you place them?...

The power jack footprint in the kicad design has only circle holes but in the Eagle design has "square" holes in the "edge cuts mask": ![image](https://user-images.githubusercontent.com/500841/73402331-d5bdc700-42cb-11ea-8b66-7b59ab930939.png)

This two problems are the only differences that I can find that have to be fixed.

We can change the 2kV to a more common value >500V