Shoaib Meenai
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Shoaib Meenai
Since https://reviews.llvm.org/D25721, LLD has assumed this. I assume other linkers behave similarly, and LLVM's ARM backend also assumes that R_ARM_PREL31 is PLT-generating. Update the ABI to reflect that.
I'm tracking https://github.com/llvm/clangir/pull/569#discussion_r1609000335 here so we don't forget it. https://godbolt.org/z/9b4o1GKrK shows that OG CodeGen adds `inrange` to the `getelementptr` for the vtable address point, but CIRGen doesn't, so we should...