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                                            sizhuo-zhang

CPU cycle count

I don't think there is RV32G implementation... The only one is RV64G OOO.

error during the boot (risc-pk/bbl) on F1 (AWS)

It seems that ubuntu.exe is not linked properly with libfesvr.so. load_elf and memif_t are both defined in riscv-fesvr. Try "ldd ubuntu.exe" to see if any .so is missing. Besides, have...

error during the boot (risc-pk/bbl) on F1 (AWS)

According to the outputs, things fail when we try to call the load_elf function in riscv-fesvr to parse the boot-rom elf file rom_core_1. The specific failure point is when load_elf...