Aleksey Shipilëv
Aleksey Shipilëv
There are GHA test failures, not sure if they are due to this fix, please check?
I see Mac runners are scarce for 11, and anyway there is little opportunity for us to debug it. So I would instead go and switch to latest runners here,...
Well, I just went to my `m7g.16xlarge` instance, and: ``` % java -jar benchmarks.jar -prof perfasm -f 1 JMHSample_35_Profilers.Atomic Profilers failed to initialize, exiting. Perf event count not a number...
That is to say, I am willing to accept the simple patch like: ``` diff --git a/jmh-core/src/main/java/org/openjdk/jmh/profile/LinuxPerfAsmProfiler.java b/jmh-core/src/main/java/org/openjdk/jmh/profile/LinuxPerfAsmProfiler.java index c948532f..69d74a86 100644 --- a/jmh-core/src/main/java/org/openjdk/jmh/profile/LinuxPerfAsmProfiler.java +++ b/jmh-core/src/main/java/org/openjdk/jmh/profile/LinuxPerfAsmProfiler.java @@ -46,7 +46,7 @@ public...
FWIW, I don't mind the SB assembler support to go under this, separate PR. We sometimes do it to split the work in the series of atomic commits, where the...
> > So, it would be tad less confusing if we had a dependent RFE for using SB in spin pauses, so it was obvious why do we need it....
Also, merge from mainline to get windows-aarch64 build fix, so that we test things there too.
> I'm still waiting for a use for this thing. The other project reports Evgeny linked in PR body look pretty convincing, as well as `ThreadOnSpinWait` microbenchmarks we have as...
`hs_err` says the crash is due to illegal instruction: ``` siginfo: si_signo: 4 (SIGILL), si_code: 2 (ILL_ILLOPN), si_addr: 0x00007f8de4080028 ``` I think that instruction around here, most likely the AVX...