Jiuyang Liu
Jiuyang Liu
Basically, after I take a look at the code, I think the roadmap of reinventing firesim Transform contains following steps: - Verification API can be replaced via single CIRCT transform...
I wonder how to define those undefined behavior in sail for the ISA Manual? SAIL is more like to an implementation to the RISC-V ISA, is there any plan to...
Why not using CIRCT transform to handle this? If the code inside WireInit is a block, what will happen in this situation?
DTS is harder then what I expected: at least blocked by: https://github.com/chipsalliance/chisel/issues/3939 This is a tricky issue for D/I integrations... I personally would like to keep this refactoring slow, until...
> Regarding type return types for operation declared in Bits, indeed in theory they should always be Bits. The point is ... it can be really painful to be forced...
I do want to have a Chisel Type system specification in the following version of Chisel, including operator, lowering specification, data structure(including Scala Type and chisel dynamic type). I believe...
I’m wondering how about going to another path to intmodule version of SRAM? w/o using firrtl.mem as intermediate representation? We also have some problem on the memory for the mbist...
@lordspacehog Can you give me an small memo on how to split the diplomacy, I used to have my own way, and I need to verify your version to carefully...
@lordspacehog I sent u an invitation, please directly push to a branch to chipsalliance/diplomacy, and I can take a look ;p
> @sequencer accepted the invite, but it looks like i don't have push access to the repo, only triage. if you can update that i'll get a branch pushed ASAP....