Jiuyang Liu
Jiuyang Liu
Yes, I mean in ASICs seems FIRRTL cannot express the `ReadFirst` or `WriteFirst` behaviour since this leakage of MemIR.
I'd like to have provide a `BundleLit` API for this usage. Working on a small example.
I agree, Mux1H taking enum is a necessary feature that we have benign missing. As for `decodeAs` or similar API, I'd like have a API like this: ``` instr, term,...
You are right, I think I can add a something like `decodeAs` API to keep the type safety. And `TruthTable` should add a sugar to consume `BundleLit` to generate a...
Yes, APIs for decoder is pretty primitive, I have been thinking adding a new dataview based API to view instructions as decode result. I'll prototype it this weekend(Sorry I have...
Sounds good. I'll have a try in Carlos repo.
Here is my plan: I'm adding a API like this: ``` implicit class RecordToBitPat[T Map( b.a -> BitPat(5.U), b.b -> BitPat.N(), b.c -> BitPat(MyEnum.sB.litValue.U) ) } ``` With this API,...
> Looks good to me. With one of @carlosedp's PRs, we could even simplify: > > ``` > b.c -> BitPat(MyEnum.sB.litValue.U) > ``` > > to > > ``` >...
The tricky things are macro and compiler plugin, both of which are tightly integrated to Chisel. I'm also experimentally splitting a Scala3 & Scala213 code bases in #2285, but not...
If not using a VIA ROM or other custom designs, this seems to be a state-of-the-art SBox implementation(it can be directly synthesis with a good performance), and its idea can...