Robert Winkler
Robert Winkler
### What's hard to do? (limit 100 words) Even though creating muxing/demuxing logic for channels is an easy concept it requires quite complex code, with nonblocking receives to allow free...
### What's hard to do? (limit 100 words) To obtain accurate timing information for a code that produces non-synthesizable Verilog constructs like `trace_fmt!`. Some of the logic may be used...
### What's hard to do? (limit 100 words) In complex designs, understanding data flow is crucial for debugging and identifying bottlenecks. Errors and unhandled corner cases can propagate, causing issues...
**Describe the bug** Currently, the `XlsTypeError` for mismatched values in `config()` does not provide any information about the channel's direction. This may be misleading especially when the same type of...
**Describe the bug** Having two non-parametric procs in one DSLX file triggers errors when running DSLX tests using the `xls_dslx_test` rule. The test itself is not even necessary, as it...
### What's hard to do? (limit 100 words) There is currently no ROM Model available in DSLX. Although a RamModel (1R1W RAM) can be used as a substitute in tests,...
### What's hard to do? (limit 100 words) Generating IR/Verilog out of a parameterizable proc is not possible when using Bazel rules ### Current best alternative workaround (limit 100 words)...
### What's hard to do? (limit 100 words) As for today, the value of DSLX for-loop iterator is not treated as constant when iterating over constant values. Having the ability...
This PR adds the Cocotb framework and simple driver and monitor classes to handle XLS channels in the cocotb simulation. A simple example is also given to verify the added...
### What's hard to do? (limit 100 words) Currently, the only way to create a constant available in the entire proc's scope is by using a parameter with a default...