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Rust's standard library vendor-specific APIs and run-time feature detection

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This allows using feature detection macros, without placing a requirement of enabled stdsimd feature gate from end users. A follow-up to changes from #1311, which introduced the new macro. Noticed...

See https://github.com/rust-lang/rust/pull/100746

The files generated by the intrinsic test tool currently repeat the lines for the call multiple times, which sometimes generates very large test files. Changing it to use a loop...

I already opened rust-lang/rust#100752, but this might be the more relevant location. More details are in the attached issue, but there exist CPUs that have GFNI and VAES without AVX-512,...

Hi, i am playing around Wasm and SIMD, trying different implementation in different languages. I dont know much Rust, but i have noticed a weird conversion with a test. My...

On x86_64, the SSE floating point control register (MXCSR) has two bits concerned with denormal floating point values. The purpose of these bits is to enable a mode that avoids...

Most AVX intrinsics should be const. In particular, those that create vectors (eg the `set1`) variants. This is probably true of the other vector instruction sets (eg SSE2). Undoubtably, this...

This pull request replaces use of inline assembly into LLVM intrinsics for RISC-V Zks functions. This change would enable optimizations by using LLVM intrinsics. This pull request also adds a...

core::arch is missing RISC-V support, I'm specifically interested in adding support for the equivalent of rdtsc. This was spun off https://github.com/rust-lang/stdarch/issues/40 It was mentioned there "We generally try to stick...

Is it possible to change ZF flag using asm!? For intrinsics _mm512_kortestc: Description Performs bitwise OR between k1 and k2, storing the result in dst. CF flag is set if...