Rohit Singh

Improve calculation of MMCM multiplier and divisor values

1

The current code calculation of multiplier and divisor values for 7-Series (i.e, with MMCM) is not robust, and can fail (for example when setting resolution to `[email protected]`). We need to...

Initial gateware code for VGA capture

4

Changes: - Added gateware code for vga capture in `gateware/vga` - Added `atlys_vga.py` target for vga capture - Modified atlys platform file with vga pins - Added some firmware code...

Migen outputs incorrect verilog in specific use-case

6

I wrote a Migen code which used MultiReg for signal synchronization across clock domains and the relevant section is similar to the test code below: ```python from migen import *...