CycloneVSoC-examples

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Making *.ko in Linux-modules/DMA_PL330_LKM/

1

Hi, robertofem I have tried to run supplied examples in Linux environment for HAN pilot platform from Terasic that uses Arria 10 SoC FPGA. However, I met several problems.. First,...

SuchangKim

Two questions on your DMA FPGA hardware

2

Hello, I have two questions on your [DMA FPGA hardware design](https://github.com/robertofem/CycloneVSoC-examples/tree/master/FPGA-hardware/DE1-SoC/FPGA_DMA). 1. Why did you chose 100MHz for the PLL output? It that the maximum for any of the used...

AnotherGitAccount

https://github.com/robertofem/CycloneVSoC-examples/blob/fdee1720fea38249eb1173337f5d7d303a0c0ab8/Baremetal-applications/DMA_transfer_FPGA_DMAC/dma_demo.c#L184

mvk83

To correct the swapped calling parameters as described in the Issues.

affe00

What the difference from Altera-SoCFPGA-HardwareLib-DMA-CV-GNU ?

1

Hello, I see in readme that example Altera-SoCFPGA-HardwareLib-DMA-CV-GNU is mentioned (though could not find it in my 14.1 EDS). So, what is the difference between the above example and this...

ranshalit

Minor defect in ghrd_top.v

3

Hello, In CycloneVSoC-examples/FPGA-hardware/DE1-SoC/FPGA_DMA/ghrd_top.v, line 335: .axi_signals_aruser (pio_controlled_axi_signals[ARPROT_BASE+: ARPROT_SIZE]), .axi_signals_arprot (pio_controlled_axi_signals[ARUSER_BASE+: ARUSER_SIZE]) The name of inputs and the parameter macros seems to be reversed. This might not be a problem now,...

affe00

Hi Roberto, I'm a FPGA novice and currently doing a research project on DE1 SoC. I've already created a custom FFT core using the FPGA fabric and I want to...

Zenkai-core