riscv-fesvr
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RISC-V Frontend Server
Non-compiled simulators such as Cadence Xcelium pass the entire argument list to fesvr, most of which can be ignored using the +permissive and +permissive-off options. Passing file name arguments, however,...
Any idea what this is about? ``` /home/lukas/libreelec/build.LibreELEC-HiFive.riscv64-9.0-devel/riscv-fesvr-f683e01/fesvr/encoding.h:178:29: error: expected unqualified-id before '(' token #define write_csr(reg, val) ({ \ ^ /home/lukas/libreelec/build.LibreELEC-HiFive.riscv64-9.0-devel/riscv-fesvr-f683e01/fesvr/dtm.cc:393:17: note: in expansion of macro 'write_csr' uint64_t dtm_t::write_csr(unsigned which,...
The current implementation assumes that the debug module base is at 0x00. This makes the current fesvr implementation incompatible with platforms where the debug module is mapped to a different...
Hi, I made small refactor of existing args implementation. Hope you like it :+1:
I am using arm-xilinx-linux-gnueabi-g++ version(4.7.2) I got the error: riscv-fesvr/fesvr/htif.cc: In member function 'virtual void htif_t::load_program()': riscv-fesvr/fesvr/htif.cc:108:11: error: 'runtime_error' is not a member of 'std' Makefile:310: recipe for target 'htif.o'...
I followed https://github.com/riscv/riscv-fesvr#build-steps ,but in the directory "/riscv-tools/riscv-fesvr/build" there is just "elf2hex" executable file without "fesvr-zynq" executable file.
Currently the way FESVR uses the program buffer to load programs and write CSRs, it needs a lot of words of program buffer and doesn't consider implicit ebreak. (It doesn't...
This causes htif to skip unknown arguments that start with `+`. Other arguments that start with `-` will still issue stderr messages but not stop option parsing. This is an...
Rocketchip (@680f3b162047c1ac36390dcdf682815fc0b24ffe) configuration: DualCoreConfig (default, unmodified) On spike -p2, a bare-metal program is executed by both harts simultaneously. The rocket-chip emulator (Verilator) uses the dtm_t interface for emulation. Executing a...
I'm trying to debug spike and riscv-fesvr with GDB. spike by default is compiled with debug symbols (`-g`), which is good, but riscv-fesvr is not. On both, I also want...
