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Published 20 hours ago • verified publisher icon risclite
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SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

Results 3 SuperScalar-RISCV-CPU issues
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Linux compatibility

Hello, Does this core be able to run Linux on it.

JOHNTBIJU avatar JOHNTBIJU

TileLink支持

请问大佬是否有考虑支持TileLink总线以接入Rocket平台进行更加广泛的应用呢？

Yuxin-Yu avatar Yuxin-Yu

Non-Debug Reset

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I'm trying to compile this core without `SRC1_DBGC_EN` set. However, I get an error on line 552 of `scr1_pipe_top.sv` stating that `rst_n` is declared implicitly. Is this wire supposed to...

enfreck avatar enfreck

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verified publisher icon risclite

Metadata

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

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