Richard Meadows

Hi Elias! Very nice that you're trying out the stm32h735 support already. Your Cargo.toml setup sounds correct, as you've found out it requires this change until at least the PAC...

Reopened after it was closed by an errant bors

`cargo objcopy --example blinky --features=stm32h743v,rt -- -O binary blinky-bin`

@ostenning There's a few changes to the sdmmc support here, it would be helpful if you could try this out!

Thanks @ostenning 👍 I was looking for a sanity check really, so that test with `embedded-sdmmc-rs` is great

@burrbull No I don't plan to update f4xx-hal. The F4 reference manuals I found don't mention eMMC at all (although it might still be possible..) and I don't have any...

bors r+

Hi! Great that you're investigating this. Unfortunately I don't have an example to contribute, but it would be great if someone else can! As far as I can tell, Macronix...

I've started implementing some new methods for interfacing with OCTOSPI flash memories, and these are probably applicable to QSPI also. I'll make a PR with the progress so far..

In the example in that PR there's an instruction with no address and no data phases ([line 80](https://github.com/stm32-rs/stm32h7xx-hal/pull/230/files#diff-37e1cf6c7c3da03fb936b858738b81830c681cced7575695592991fb5186d7ceR80)), as well as an instruction with both address and data phases ([line...