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Possible solution in 427a249b47b226170a0b7950c27de7c1f29057b6

Hi, I have tried the above and it still doesn't work. Although, finding a solution that doesn't require removing the spiflash XIP code would be nice to free up some...

One thing to note is that the LED chaser works as expected. However, the UART pins seem to be internally routed in the pcb from the FPGA to the usb...

Did a few more tests, decreasing the frequency works, with output on the uart, but increasing frequency does not.

I think I was checking the synthesis results instead of the pnr results. It works now when the pnr passes. Example synthesis report: 

Hmm, not quite. At 42MHz the pnr timing passes but there is no output. PNR report:  Sometimes there is only a single line being output while the cursor moves...

I think this may be a toolchain problem? I'm not sure. There is uart output for the standard cpu configuration at 42MHz but once passing --cpu-variant full the problem above...

The board has an LED chaser, which is probably close enough? The LEDs light up at approximately the correct timing as far as I can tell. It seems like it...

Thanks for the reply. If I'm not wrong to do this manually this involves making a new Wishbone/AXI CDC wrapper where all the bus lines are used in a BusSynchronizer...

Commit efe7a4a brings in the updated frontend with a frequency input control similar to other SDR softwares.