rbiasini

Results 20 issues of rbiasini

DBG_SM_0: make sure debug mode it's off at startup

CLK_SM_2: Independent Watchdog

CLK_SM_1: CSS Clock Security System

VSUP_SM_2: independent watchdog

VSUP_SM_1: Supply voltage monitor

VSUP_SM_0: Periodical read-back of configuration registers

CRC_SM_0: CRC self-coverage

ATIM_SM_1: 1oo2 for counting timers

GTIM_SM_1: 1oo2 for counting timers

USB_SM_2: Information redundancy techniques on messages