Ramon Wirsch

> Correct me if I'm wrong, but instruction invalidation on data writes is controlled by the IFENCE instruction from the Zifencei extension. Yes, that is what the ISA defines. But...

I saw the restructuring to that distributed code after I had started work on my unit. I did not want to rebase but also figured there would be no performance...

I did not port my changes over to a new branch, without knowing why it has not been merged, just to test if it fixes some issues. But a cursory...

After delving deeper into #22, I have now concluded, that the fault lies not with the handling of peripheral loads. Those do not need to be committed separately, as long...

Regarding the need to potentially abort / delay interrupting, due to already issued instructions requiring exceptional behavior: This kind of race condition is already in the processor, if you receive...

I have fixed enough of it in my fork to make amoadd work. It is not thoroughly tested as I needed only very specific functionality to actually work so far...

@smusich I simply used the Fedora 38 repo. Works without any further changes. Just needed to hardcode the fedora release version. @tonyhutter I believe we are both already on zfs-dkms...