psyborg55
psyborg55
R384, located between LEDs and DRAM module
> For the past two weeks, my devices were running fine on stock U-boot. 3 days ago I updated them to test build with increased gate open latency to 2CL+1...
You can write 633C8178 to PMU1 and 00380000 to PMU2 registers, this is what stock uboot does to maintain optimal voltage.
tried 2CL+1 build on my device and all boot attempts either crashed or console output hanged and watchdog reset was triggered
It's a manufacturer driver problem. I see this in windows, when one device has strong signal (90%) and another weak (48%) both signals are averaged and both devices show 69%...
Yes, it is in bulk mode. This device is first revision so 3103b is not relevant. m88ds3103 sets it to 16000, inside em28xx module. With some modifications, i managed to...
No, it is a general issue.
Assuming no one else went so deep in driver debugging? I think you can reproduce the problem even without satellite installation, i will check and update here. I assume it...
Don't get me wrong, but standard end users wont recompile driver, and go change all kinds of values in there to notice something isnt working as it should with reference...
Yes, of course. But it would be good if some users test it before submission. And some of them are related to features that are not finished yet, like automatic...