Cho Moon
Cho Moon
Let me re-run this with the latest version of CTS.
Here are some observations: 1) There are no macro sinks here, only registers. So -insertion_delay doesn't help. 2) Skew gets worse after timing repair. 3) clustering diameter and size are...
We will keep this issue open for now. Useful skew is a different solution.
I didn't see any macro sinks, so where did you see insertion delay changes? There are some "wire" buffers on clock trees that degrade clock skew.
Yes, the latencies increased after repair_clock_net.
More CTS messages have been moved to debug in [PR 4459.](https://github.com/The-OpenROAD-Project/OpenROAD/pull/4459)
@maliberty, can Jack's PR be merged?
Jack, Please do the following and resolve merge conflicts. 1) git fetch origin 2) git merge origin/master 3) manually merge conflicts Thanks. Cho On Tue, Feb 20, 2024 at 2:01 ...
Ok. Let me take a look.
[PR 4383](https://github.com/The-OpenROAD-Project/OpenROAD/pull/4459) should fix the issue of cells getting placed outside core area and cells on top of hardmacros.