plappermaul
plappermaul
The current PR works exactly this way. So if nobody has a good idea I will stay away from the platform driver.
I got lost in platform driver and MIPS clock initialization routines. But now I think the framework should be fine. Find attached a partly rewirtten PR. Please comment on platform...
Off we go. PR v3 includes an overhaul of the clock driver and adds full RTL839x support. Feel free to test & comment.
Aside from the discussion above I updated to PR v4
PR v5 is ready for review. Changes since last version: - RTL838x assembler setters (can change memory clock) - allows overclocking - SRAM anti-overwrite memory check - DDR3 300 MHz...
PR v6 updates: - allow speed ranges in DT - fix instability due to unfinished cache flushes - Finer speed steps for CPU on RTL839x (25MHz)
PR v7 includes: - switch to OPP tables - enable cpufreq-dt + userspace governor To sky-rocket over the 200 comments I once again expect tons of nit-picky feedback. Nevertheless it...
Looks good. URL is most recent version. Regarding the test: Do whatever you like and how much time you can spare.
Thanks for testing and sorry for the inconvenience. Two questions: - What SOC are you testing on 838x oder 839x and what model? - Cann you set frequency manual? echo...
I took a look at the ondemand governor. From my observation it switches clocks frequently and and as we need busy waiting loops we consume some CPU during switching. That...