Piotr Binkowski
Piotr Binkowski
This PR adds scripts that automate process of testing old tool revisions with current test suite To use it, just run `tools/compare.sh ` where `n` is number of versions to...
[s80x86](https://github.com/jamieiles/80x86) is a 80186 compatible CPU written in SystemVerilog. At some point this can be added as a test case.
This PR adds CI run that builds `proj_template_v` for Arty board using SymbiFlow toolchain. After a successful build outputs are saved as artifacts.
This PR removes combinational path from `cmd_valid` to `rsp_valid` which slightly improves fMax (1-2MHz in recent tests) and FWIW doesn't impact model evaluation time.
`openocd` that comes with buildenv as a conda package fails to flash image on the FPGA flash, it looks like it has some kind of communication issue because the flash...
While working on #244 I noticed that some designs result in yosys failing on `yosys-abc` call: ``` 4.46.18. Finished OPT passes. (There is nothing left to do.) 4.47. Executing TECHMAP...
Depends on #238 This PR aims to add support for HDMI2ETH target for the following boards: - [ ] NeTV2 - [ ] Nexys Video - [ ] Numato Opsis...
This PR modifies the HDMI2USB target of Opsis and Atlys boards to utilize [FX2Crossbar](https://github.com/GlasgowEmbedded/glasgow/commits/master/software/glasgow/gateware/fx2_crossbar.py). Using this crossbar it is possible to access 4 FX2 USB endpoints using LiteX Streams. Current...
I've built an image for Numato Opsis using latest litex-buildenv using the following configuration `PLATFORM=opsis TARGET=video CPU=vexriscv` and LiteX BIOS `memtest` fails on the board. The board itself works correctly...