peterzieba

The issue appears to be that the file is opened as "text" mode. It looks like the CRLF from a Windows/DOS .JED file ends up as just LF in the...

I came across [Spydrnet](https://github.com/byuccl/spydrnet) which can read EDIF and convert it to Verilog (as well as generally modify netlists). I've been playing with it recently and found it to work...

Yeah, I believe that should work. OE1 12V is only needed to unlock a part, and the Arduino JTAG project you mention looks like it might be able to do...

Yes, the "V" parts I believe are the 3.3V parts. There are even the "BE" parts which have two different voltage IO banks, but I believe these parts are somewhere...

http://matthieu.benoit.free.fr/all03/adp/HiLo_ADP-ATF1500.PDF That's the diagram I mentioned for programming the ATF1500C. It provides the names and pin mappings to the pins required for programming those devices in case this is helpful...

Ah, on the topic of the CUPL compiler I have some tidbits. I think using the CUPL compiler directly from the freely available WinCUPL might be the best approach and...

So, OE1 can be ignored entirely if you have a blank / brand new chip, however, in the event that a device has already been programmed, the JTAG interface _might_...

>Ideally somebody would write a piece of open-sourced software to convert .jed directly to .xsvf You mean like this? https://github.com/whitequark/prjbureau/blob/main/util/fuseconv.py >I'm not having high hopes that somebody would write such...

In brief, I do not know why you are seeing 2.3V on TDO, but I would suspect something is loading down the signal somewhere or not all four Vcc pins...

Ah, I see what's happening here. I looked at the datasheet for the ATF1504ASL, whereas you looked at the datasheet for the ATF1502ASL. Looks like there is a discrepancy there....