Raptor
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Raptor end-to-end FPGA Compiler and GUI
Dm updates 1 Fix the include error for scope_guard.hpp Stricten the relax code. Update unittest New GUI for the custom device feature: eFPGA Configurator
Pending on RIC API update Changes: - Support CORE clock based on the port connection (revert auto-determination) - Support I_SERDES CLK_OUT - Strict checking on pin utilization after considering bidirectional
Is there configuration and example to develop on CLEAR FPGA with Raptor ? https://github.com/efabless/clear/ Clear is an eFPGA generated with [openFPGA](https://github.com/lnis-uofu/OpenFPGA) and included in [caravel](https://github.com/efabless/caravel).