Bill Flynn

Cleaned up compile/elab errors, but fails with X's after a few I-fetches: ``` `define EXPAND_TLB_TYPE 0 ```

UM 14.5.142 ```verilog spr_xucr0_init = 1120 assign spr_xucr0_clkg_ctl = xucr0_q[38:42]; assign spr_xucr0_trace_um = xucr0_q[43:46]; assign xu_lsu_spr_xucr0_mbar_ack = xucr0_q[47]; assign xu_lsu_spr_xucr0_tlbsync = xucr0_q[48]; assign spr_xucr0_cls = xucr0_q[49]; assign xu_lsu_spr_xucr0_aflsta = xucr0_q[50];...