Fixed parameter overflow in divsqrt_multi

[sifferman]

Hello!

Issue

Commits https://github.com/openhwgroup/cvfpu/commit/51e6ba8739bc6df720a493b1a23e6e6d2a9f512a and https://github.com/openhwgroup/cvfpu/commit/1548daed714f94f32dc8401aa0587bda8ad1034c from PR https://github.com/openhwgroup/cvfpu/pull/102 have introduced a bug due to the use of NUM_INP_REGS-1 without checking NUM_INP_REGS > 0.

This causes the basic instantiation example to fail in DC due to Error: fpnew_divsqrt_multi.sv: integer overflow occurs. (ELAB-210).

Fix

I now split all 3 references to reg_ena_i[NUM_INP_REGS-1] into a new signal last_reg_ena that is forced to 1'b0 if NUM_INP_REGS==0.

Now the basic instantiation example once again is synthesizable.

Thanks!