Run CORE-V-VERIF “custom” tests with Spike ISS enabled

[DBees]

This task is completed when all test-programs in cv32e20/tests/programs/custom are running (not necessarily all passing).

[MarioOpenHWGroup]

Almost all of the ci_checks tests running and passing with cve2 and spike working in tandem mode.

CI Check results:
                 vsim-interrupt_test.log :  FAILED
           vsim-corev_rand_interrupt.log :  FAILED
           vsim-corev_rand_interrupt.log :  FAILED
    vsim-corev_rand_jump_stress_test.log :  PASSED
               vsim-csr_instructions.log :  PASSED
                        vsim-illegal.log :  PASSED
          vsim-corev_rand_instr_test.log :  PASSED
                    vsim-hello-world.log :  PASSED
vsim-corev_rand_arithmetic_base_test.log :  PASSED
  vsim-riscv_arithmetic_basic_test_0.log :  PASSED
CI Check FAILED: Expected 11 tests to run but found only 10 PASSED or FAILED messages

[DBees]

24/5/2 - many tasks passing

[MarioOpenHWGroup]

related task https://github.com/openhwgroup/cve2/issues/265

[MarioOpenHWGroup]

Currently status of the ci_check

CI Check results:
                     vsim-debug_test.log : ABORTED
    vsim-corev_rand_jump_stress_test.log :  PASSED
               vsim-csr_instructions.log :  PASSED
                 vsim-interrupt_test.log :  PASSED
                        vsim-illegal.log :  PASSED
          vsim-corev_rand_instr_test.log :  PASSED
                    vsim-hello-world.log :  PASSED
vsim-corev_rand_arithmetic_base_test.log :  PASSED
  vsim-riscv_arithmetic_basic_test_0.log :  PASSED
           vsim-corev_rand_interrupt.log :  PASSED
           vsim-corev_rand_interrupt.log :  PASSED

[MarioOpenHWGroup]

Modifications to the cve2 bsp in order to align the corev-dv tests with the testbench

[MikeOpenHWGroup]

Can this task now be marked complete?