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perf_counters.sv: unimplemented mhpmcounters shall be read-only 0
see The RISC-V Instruction Set Manual Volume II: Privileged Architecture Version 20211203
3.1.1 Hardware Performance Monitor All counters should be implemented, but a legal implementation is to make both the counter and its corresponding event selector be read-only 0.
Signed-off-by: André Sintzoff [email protected]