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[BUG] ariane_xilinx.sv debug module driving conflict

Open asicenthusiast opened this issue 2 years ago • 1 comments

Is there an existing CVA6 bug for this?

  • [X] I have searched the existing bug issues

Bug Description

I believe there may be a problem with the assign statements in lines 506-559 of ariane_xilinx.sv for xlen==64 VC707 synthesis using the cv64a6_imafdc_sv39 configuration . These assign statements yield warnings during FPGA synthesis for the VC707 that master_to_dm does not have a driver. Also, when compiling in xcelium, there are errors corresponding to driving conflicts for master_to_dm[0]. Looking at these lines, e.g. assign master[ariane_soc::Debug].aw_id = master_to_dm[0].aw_id; , it appears the assign statement may be incorrect.

asicenthusiast avatar Oct 06 '23 18:10 asicenthusiast

Is there an existing CVA6 bug for this?

  • [x] I have searched the existing bug issues

Bug Description

I believe there may be a problem with the assign statements in lines 506-559 of ariane_xilinx.sv for xlen==64 VC707 synthesis using the cv64a6_imafdc_sv39 configuration . These assign statements yield warnings during FPGA synthesis for the VC707 that master_to_dm does not have a driver. Also, when compiling in xcelium, there are errors corresponding to driving conflicts for master_to_dm[0]. Looking at these lines, e.g. assign master[ariane_soc::Debug].aw_id = master_to_dm[0].aw_id; , it appears the assign statement may be incorrect.

Hi asicenthusiast, I just have dived into this code for a week, and spotted the same erroneous assignment statements mentioned in your original post. With this question in mind, I looked into the past issues and found your post.

Looks I am not the only one having this comment. But unfortunately, this issue had not been solved after almost 1.5 years. Still, thanks for your post.

--Vincent

chchenl avatar Feb 21 '25 14:02 chchenl